Computer Science and Application MP Set Exam 2022 Q-61to70

 

61. Which logic gate is also known as inverter ?

(A) AND GATE

(B) OR GATE

(C) NOT GATE

 (D) XOR GATE

Answer: (C)

62.The number of input to an n to 1 multiplexer is given by :

(A) n

(B) n + 1

(C) 2^n

(D) 2^(n-l)

Answer: (C)

63. The technology used to fabricate integrated circuits is called :

(A) Digital Signal Processing

(B) Microcontroller Programming

 (C) VLSI (Very Large Scale Integration)

(D) FPGA (Field Programmble Gate Array)

Answer: (C)

64. Which error detection code is based on polynominal division ?

(A) Parity check

(B) Checksum

(C) CRC (Cyclic Redundancy Check)

(D) Hamming code

Answer: (C)

65. The hexadecimal number E5 in decimal is equal to :

(A) 229

(B) 197

(C) 2290

(D) 1970

Answer: (A)

66. Which register is responsible for temporarily storing the result of arithmetic and logical operations ?

(A) Program Counter (PC)

(B) Accumulator (ACC)

(C) Memory Address Register (MAR)

(D) Instruction Register (IR)

Answer: (B)

67. CPI recently became more important performance metric than the clock cycle rate for processor performance index, because :

(A) Increasing processor clock cycle rate is almost reaching the physical limit.

(B) CPI and clock cycle rate are the terms having exactly the same meaning.

(C) Processor clock cycle rate can be increased without any limit.

(D) CPI is always equal to 1 and clock cycle rate is same as CPI.

Answer: (A)

68. The microinstruction format in microprogrammed control is usually determined by the :

(A) Instruction set architecture

(B) Processor clock frequency

(C) Size of the control memory

(D) Type of the microprocessor used

Answer: (A)

69. Which of the following statements accurately describes Direct Memory Access (DMA) in computer system ?

(A) DMA is a technique used to improve the performance of a cache memory.

(B) DMA is a type of interrupt used for handling errors in data transmission.

(C) DMA allows peripheral devices to transfer data directly to and from memory without involving the CPU.

(D) DMA is a mechanism that enables multi-threading and parallel processing in a processor.

Answer: (C)

70. In a multiprocessor system with private cache, which of the following mechanism is commonly used to maintain cache coherence ?

(A) Write Back Protocol

(B) Snooping Protocol

(C) Exclusive Access Protocol  

(D) Direct Memory Access (DMA)

Answer: (B)